1. Field of the Invention
The present invention relates to a semiconductor memory device, for example, NAND type EEPROM (Electrically Erasable and Programmable ROM).
2. Description of the Related Art
In this type of NAND EEPROM, data is basically written page by page. Since the page-by-page writing is done in such a way that programming is effected after all of one page of data is input to a latch circuit, the data input cycle should be discriminated from the program cycle. It is thus necessary to acknowledge the completion of input of the entire one page of data.
The end of the data input cycle is conventionally detected by counting the number of pieces of input data using a counter circuit.
Counter circuits conventionally used each occupy a large area in a semiconductor memory device and have a complicated structure.